M ICROWAVE FET Microwave FET : operates in the microwave frequencies unipolar transistors – current flow is carried out by majority carriers alone Its. - презентация

1 M ICROWAVE FET Microwave FET : operates in the microwave frequencies unipolar transistors – current flow is carried out by majority carriers alone Its a voltage controlled device – voltage at the gate terminal controls the current flow.

2 Advantages of FETs compared to BJT It has voltage gain in addition to current gain Efficiency is higher Noise figure is low Input resistance is very high, upto megaohms. Operating frequency is upto X band/

3 Physical Structure

4 N-channel JFET: – N-type material is sandwiched between 2 highly doped of p-type material (p + regions) If the middle part is a p-type semiconductor, then its p-channel JFET. 2 p-type regions in the n channel JFET – Gates Each end on n-channel is joined by a metallic contact. Source : Contact which supplies source of the flowing electrons Drain :Contact which drains electrons out of the material I d : flows from drain to the device For p-channel JFET, polarities of Vg & Vd are interchanged. Electrons have higher mobility – n-channel JFET provides higher conductivity. – Higher speed

5 Operation Under normal conditions, V g = zero, I d = zero. Channel between gate junctions is entirely open. When Vd is applied – n-type semiconductor bar acts as resistor – current I d increases linearly with V g For p-channel JFET, polarities of Vg & Vd are interchanged. As Vd is further increased – majority of free electrons get depleted from the channel. – Space chare extends into the channel. – space charge regions expand & join together. – All the free electrons are completely depleted in the joined region -> PINCH OFF If Vg is applied : pinch off voltage reduces

6 I-V CHARACTERISTICS

7 Pinch off Voltage It is the gate reverse voltage that removes all the free charges from the channel. Poissons equation for the voltage in n- channel

8 Integrating once again and applying boundary condition V=0 at y=0 yield Integrating the above equation and applying boundary condition ie. E=0 at y=a yield

9 (a : the height of the channel in metres) Pinch off voltage under saturation condition is

10 The N-channel resistance

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13 Substitution and rearrangement gives

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15 BREAKDOWN REGION As Vd increases for a constant Vg, the bias voltage causes avalanche breakdown across the junction. Drain current Id increases sharply. The breakdown voltage is

16 MOSFETs- Metal Oxide Semiconductor Field Effect Transistors 4 terminal – Source, Gate, Drain and Substrate Simple structure and economic Types – NMOS – PMOS – CMOS Current is controlled by electric field : o Junction Field Effect Transistors

17 PHYSICAL STRUCTURES

18 N-CHANNEL MOSFET P-type substrate 2 highly doped n regions diffused – source & drain separated by 0.5um Thin layer of silicon dioxide grown over the surface. Metal contact on the insulator – acts as gate.

19 Electronic Mechanism 1.No gate voltage applied – connection b/w source & drain : 2 back to back pn junctions – Reverse leakage current b/w Drain and Source 2.Gate voltage is +ve w.r.t. Source. – Positive charge deposition on the gate metal – Negative charges are induced in the p-substrate at the semiconductor-insulator interface – Formation of channel conduction of I d 3.Threshold Voltage : Minimum gate voltage for channel formation

20 Modes of Operation Enhancement Mode – Normally off mode – Gate voltage = 0 V – Very low Channel conductance – Considered as the OFF state – Positive gate voltage to turn on the device – Channel length is Enhanced – Application : As Linear Power Amplifiers

21 Depletion Mode – Normally ON mode – A channel is present even at zero bias – To turn off the device Negative gate voltage – Depletion of charge carriers by the application of negative gate voltage

22 THANK YOU